Some things should be simple, even an end has a start

This is the last post this blog will ever have. I'm writing it during my last days of employment at the University of York, and I decided it would be appropriate to simultaneously close the lifecycle of the blog.

I started this blog in May 2011, a few years into my academic career in York (I moved from TU Darmstadt in October 2008). Its goal was to host my reflections on the teaching and research contributions I was making in the area of embedded systems. While academics have well-established outlets for research outcomes (conference proceedings, journals), blogs became an informal outlet for the "meta" level, i.e. reflection and discussions on the practices of research and teaching. If you look into the past posts, you will find discussions about teaching styles, rants about peer review, celebrations of research successes and even job adverts. But perhaps the most common theme in the blog is the celebration of the success of my students. This includes not only my research students, but also the undergraduate students who won my Embedded Systems Design Challenge every year (and who would flaunt their picture in this blog as a badge of honour!)

After nearly fifteen years at the University of York, I have now accepted a chair at the University of Leeds. While I am very excited about the new opportunities and challenges that will come with the new position, I also look back on all of the accomplishments during my tenure at York. I have graduated nine PhD students (and have four still in the pipeline), co-created the SEtS doctoral centre, brought to York more than £1 million in research funding as a principal investigator and nearly £3 million as co-investigator (within projects with a total funding surpassing £14 million), published more than 100 articles in the top conferences and journals in my area, taught 10 different modules to York students, led the Real-Time and Distributed Systems research group, organised two conferences, won 11 awards for my research and teaching, hosted eight academic visitors, co-created the Wireless Society, examined 28 PhD theses, presented seven keynotes and 25 invited talks, managed three MSc programmes, organised two summer schools for international students, supervised eight post-doctoral research associates, 33 MEng/MSc projects and 22 BEng projects. And I've written 30 posts to this blog. This feels like a good time to close this chapter, so this 31st post will be the last one. 

But I can't close this chapter without thanking the people that made my whole experience at York very enjoyable. I will use the "you know who you are" blanket statement, but I will also name a few people who made an outstanding impression on me over the years, and will use two and only two words to describe what I admired the most about each of them (not an easy task!).

I must start with the unassuming brilliance of Alan Burns and the friendly wisdom of Andy Wellings, as they were both mentors and examples to me. Then, in no particular order: Debra Lashua's vibrant competence, Ana Cavalcanti's drive and reliability, Lilian Blot's insightful determination, Jim Woodcock's elegant generosity, Luiza Morrell's goal-oriented mindset; Chris Power, caring and outspoken; Jo Phillips, calm and helpful; Helen Ducker, quietly unfazed; Mike Freeman's resilient inventiveness; Ibrahim Habli's diplomatic tenacity, Susan Stepney's collaborative creativity, Jeremy Jacob's honest kindness, Michael Hicks' can-do attitude, Catherine Smith's work ethic, Sia Shahandashti's principled stance, and Richard Paige's informal leadership.

And I will also use the "last but not least" cliche to thank all my undergraduate, master and doctoral students. Thanks for all the discussions, for challenging me, and for expecting the best of me. I owe you a lot. And even if you won't admit it, I'm claiming a tiny bit of credit for all your successes.

I will continue to live within York's city walls and will retain an honorary visiting professorship in the department, so I will still be around and hope to keep in touch with everyone. But for now, I must say: LSI, over and out.  

EMBS Design Contest 2022

Again in 2022, EMBS students took part in a design contest. The whole class was divided in four groups, and were given a network-on-chip (NoC) task mapping problem to solve within a week. As the effects of covid become less significant, we are seeing more and more students engaging with in-person lab sessions, so the participation levels in the design contest were higher than the past two years. 

The problem of this year's design contest is similar to last year's, but using a different data set for the application tasks and communications to be mapped onto the network-on-chip. This time, instead of manually creating the data set I invested some time in generating it automatically. It is an interesting task by itself, as you must be able to tune the level of difficulty yet at the same time you must be sure that there is at least one valid mapping that satisfies all the application performance constraints (which in this case is to avoid overutilising the NoC links and processing cores). 

The final results were very close, with three groups presenting valid mappings for 12-core NoCs. The winning group chose a 6x2 topology that allowed them to find a mapping that met all constraints while running the NoC at a lower clock frequency (which indicates a superior mapping). The other two groups chose mappings for 3x4 topologies, which required them to run the NoC and the cores with clock frequencies a bit higher than the nominal frequency, therefore narrowly worse than the winning group. The fourth group also presented a competitive mapping, but a bug in their mapping algorithm allowed three of the NoC links to become overutilised, thus invalidating their solution. As usual, here is a picture of (part of) the winning team.

The post on the design contest is always closed with links to the now famous EMBS Design Contest Hall of Fame, with pictures of the top teams from all previous contests: 2021, 2020, 2019, 2018, 2017, 2016, 2015, 2014, 2012, 2011, 2010 (in 2013, no group managed to finish the challenge on time).

University internationalisation

Before I joined the University of York in 2008, I worked for the Technische Universitaet Darmstadt in Germany. Just like in my current position, that job involved research, teaching and academic administration. My main academic administration task was to support the creation of an international master programme, which I then coordinated for seven years (from 2001 to 2008). It was one of the first international master programmes in Germany, and the first at TU Darmstadt. It was taught mostly in English, aiming to make it easier for international students to obtain a degree in Germany. It was a lot of work, since I had to oversee all aspects related to the programme: admission process, student support, curriculum management, accreditation, marketing, website, among other tasks. I have learned a lot in the process, and had the chance to attend several events to share my experiences with other academics playing similar roles in other German universities. It also made it easier for me to play similar roles here in York (where I have already coordinated three master programmes, and I am currently coordinating one of our PhD programmes).

Last year, I was invited to be a guest speaker in the celebration of the 20th anniversary of that study programme. Due to covid travel restrictions, the event was postponed to July 2022, and it was a success (even though the programme was almost 21 years old by then!) Among the guest speakers, Prof. Manfred Glesner (the main force behind the creation of the programme, and one of my PhD supervisors) and three former graduates. Manfred spoke about the history of the programme, and how it contributed to change the university landscape in Germany, which now attracts a much larger number of international students. The former graduates talked about the different ways that the programme kickstarted their professional lives, giving them a multidisciplinary foundation in the areas of microelectronics, communications and computer engineering. It was very rewarding to see the impact of the work we did all those years ago, and to see that even though I left TU Darmstadt in 2008 some of my contributions to that institution are still bearing fruit.

For my talk, I decided to focus on the goals and challenges of university internationalisation, and I highlighted that all success stories I am aware of required a careful inter-play between grassroots and institutional drives: motivated individuals willing to invest time into building international initiatives (degree programmes, summer schools, university networks, etc.), and flexible university structures willing to support those individuals' visions and ambitions. I also remarked that university internationalisation is a microcosm of world politics, so it is directly influenced by events around the world but it can also influence the way we understand and react to those events, and therefore discussing and putting internationalisation in practice is perhaps the best way for academics to express their world views.

Below, a few pictures from the event (photo credit: etit TU Darmstadt).

EMBS Design Contest 2021

Another year has passed, and with the relaxation of the restrictions related to the covid 19 pandemic we were allowed back to campus for all embedded systems lectures and practicals in the Autumn term in 2021. This was not possible for everyone, so all the teaching material was also made available via virtual learning environment (including pre-recorded videos of all lectures created in 2020, as well as the recording of the live lectures from 2021).

Our annual design contest took place on campus between November 23 and 25, and the design challenge was again based on the mapping of embedded software tasks onto a multiprocessor system based on Networks-on-Chip (NoC). This challenge was introduced last year, and was successfully solved by most groups despite of the difficulties of working online. One of the groups even managed to find a solution that was superior to the model solution I had found for the challenge! More details in last year's blog post.

For this year's challenge, I decided to make the problem a bit harder. Firstly, because the element of surprise would no longer be there (over the years I have witness how much students learn from their seniors). And secondly, because last year's groups did so much better than I expected, so I wanted to make sure this year's students felt sufficiently challenged.

The increased difficulty came from two small changes to challenge. The first was simple and obvious: I increased slightly the number of tasks (from 44 to 54) and inter-task communications (from 68 to 70). The complexity of a mapping problem always increases with the number of "things" to be mapped, so this was an easy way to make the problem more challenging. But it is likely that the solutions used by last year's groups would cope with this year's problem as well. So I also changed the design alternatives that the students were allowed to consider. Last year, they were allowed to lower the clock frequency of the processing cores and the NoC interconnect, as long as the application tasks would not overutilise any core or interconnect link, aiming to reduce energy dissipation. But they would not be able to overclock the cores or the interconnect: in case a particular processor configuration was not fast enough to run all application tasks without overutilising the platform, their alternative was to go for a larger platform (i.e. with more cores and a larger interconnect). This year, students were allowed to overclock processing cores and/or the interconnect by up to 20%, which provided them more design alternatives to explore (e.g. overclock a smaller platform vs. underclock a larger platform). To take into account both dimensions of the design space, the quality of the solutions found by each group was ranked by the number of processing cores they needed (lower is better), and by the frequency scaling factor for cores and interconnect (lower is better).

The class was randomly divided in four groups, but due to absences each group had between 1 and 3 active members (the design contest is not a mandatory part of the embedded systems module, and does not contribute to the final mark). They were given two days to work on the design challenge, and all groups submitted a solution by the deadline. Just like in 2020, three of the solutions submitted were valid task mappings that did not overutilise the multiprocessor platform when scaling the clock frequency by the submitted factors (one of the groups submitted only a partial mapping that did not include all tasks, so it could not be evaluated). The valid solutions submitted by groups 2, 3 and 4 required platforms with 20, 36 and 18 cores, respectively. With a smaller number of cores, group 4 was named the winner even when taking into account the frequency scaling factors used by each group. Below, a photo with the members of group 4 David Kacs and Ben Marsh (and their prize).

Again this year, I decided to award a honourable mention. This time it goes to group 2, which was actually a one-member-group, but still managed to submit a valid solution that was only marginally worse than the winning solution (20 cores running at nominal frequency, while the winners used 18 overclocked cores). Below, a photo of Aaron Christiansen, with no prize but with the recognition of being the first ever person to single-handedly complete the EMBS design contest.

Perhaps because of the additional complexity I added to the challenge, this year no group managed to find a solution that was as good as the solution I created prior to the contest (using the technique I described in last year's post). My solution requires only 16 cores, but needs a small overclocking of cores as well as the NoC interconnect. I did not share that solution with them, and instead left it as an open-ended challenge. I'm sure someone will be pleased to send me an email over the winter break showing that they could beat me...

The post on the design contest is always closed with links to the now famous EMBS Design Contest Hall of Fame, with pictures of the top teams from all previous contests: 2020, 2019, 2018, 2017, 2016, 2015, 2014, 2012, 2011, 2010 (in 2013, no group managed to finish the challenge on time).

Safe, Ethical and Secure (Embedded) Computing

A couple years ago, I was tasked by my department to put together an innovative programme to train PhD students. After doing a consultation with all colleagues in our research away day in 2019, I could see a scenario that went completely against the picture of a stereotypical PhD student as a lonely character working on a hermetic topic which they carefully hide from the world until they can publish it causing fanfare and/or Earth-shattering consequences. Instead, what emerged was the desire for a strong sense of community, and emphasis on resilience and mutual support. Among the research topics we should emphasise, the list that emerged included green computing, explainable and safe AI, trustworthy decision-making in humans and machines, and ethical digital technologies. This was a very valuable exercise, and helped us in understanding the long term aspirations of the department in terms of research.

But then the covid 19 pandemic happened, and all research activities in the department were deprioritised so we had enough manpower to cope with the heavy workload caused by the move into online teaching. The plans for the innovative doctoral traning were suspended, and only resumed in early 2021. By then, with Paul Cairns as the new head of department and Ibrahim Habli as deputy head for research, the long term research vision for the department had been aptly summarised as safe, ethical and secure computing. And the new doctoral training centre was chosen to be a key instrument in realising that view, providing fully-funded studentships to students willing to work on high-impact research in those areas. So I took on the challenge and, with excellent support from the department's admissions team, managed to advertise, interview and recruit the first batch of PhD students for SEtS, the department's Doctoral Centre for Safe, Ethical and Secure Computing. They started their journey towards a PhD two months ago, and their topics cover areas as diverse as machine learning for cocoa plant disease identification, wireless networking for swarm robotics, monetisation strategies and player well-being in online gaming, and formal proofs for security-related properties in robotic systems. Interestingly, two of them are former EMBS students, and one of them appears in the EMBS Design Contest hall of fame! I am now meeting them on a weekly basis, trying out a number of new training initiatives, and gathering feedback on how to improve the training process for future cohorts.

So while the focus of the doctoral centre is much wider, there are many opportunities for research work in the area of embedded systems. The application process will be open over the next two months, so feel free to contact me if you are interested in pursuing a PhD in our doctoral centre. I'll be happy to discuss a potential research topic, or to introduce you to colleagues that do work in the areas you might be interested in. Find more details about my research areas, and my contact information, here.

Who would not want to be part of a centre with the acronym SEtS and with a Venn diagram showing the intersection of its three main areas as its logo?

EMBS Design Contest 2020

 

One year has passed since I wrote the last entry to this blog, and everything is so different now. We had to adapt to a very complex situation, and all our teaching had to be done online this academic year. It was particularly challenging for embedded systems, which in York has always been taught as lab-centric topic. With no access to the labs, we had to work hard to achieve the same learning outcomes using design tools and simulators that could be run by students in their own computers. We had a couple issues, particularly with creating and deploying virtual machines with pre-installed tools, but given the circumstances everything went well.

Another challenge was this year’s EMBS Design Contest. The traditional format where students run against the clock to create an ad-hoc wireless network across the Computer Science building was clearly not possible this year. After thinking about it for several weeks, I was ready to cancel the contest when I had an idea that would be suitable for our circumstances. Since I had added some new material to the part of EMBS that covers platform-based design and task mapping algorithms/heuristics (as I was forced to reduce the content on embedded wireless networking due to no access to the labs), I thought I could explore that type of problem and formulate a challenge that people could address in a distributed way.

The problem I devised was to map a large application model (44 tasks, 68 inter-task communication flows) to a multi-core platform based on a 2D-mesh network-on-chip. The application tasks and communications were characterised, respectively, by their processor utilisation and network link utilisation at nominal frequencies for the cores and interconnect. The objective was to find a mapping, over the smallest 2D-mesh platform and running at the smallest fraction of the nominal frequencies, but without over-utilising any processing core or network-on-chip link. This is an NP-hard problem that I’ve addressed in my research (together with several of my post-doc researchers, Master and PhD students), but using response time analysis instead of utilisation-based tests. In either case, there are no known optimal algorithms for this problem, only heuristics that do not guarantee optimality.

Before releasing the problem, I had to make sure it was challenging enough, and that it had at least one valid solution. To do that, I have created a valid mapping for a fairly thin application model onto a 4x3 network-on-chip platform. I then inflated the utilisations of tasks and communications of that thin model until that mapping was nearly breaking the utilisation bound of the platform at arbitrary but realistic frequency levels. The inflated application model was then be the problem I posed to the students (divided in four groups), and I had a good solution that I knew was valid (my chosen mapping for a 4x3 platform) and certainly achievable by the students with a bit of effort.

Once the challenge was released, I monitored the progress of all four groups (and had one videoconference session with each group) over the 2.5 days of the contest. Students were not allowed to choose their groups, and each group had 8-10 members. I’ve noticed that only 2-5 members of each group were actively working towards a solution to the design challenge. In past years, when the design contest happened in the lab, it was common to see 2-3 students taking the lead, but then all other students would engage or at least learn from the solutions attempted by the group. In the case of remote/online groups in 2020, that “side-learning” situation (i.e. students learning from students) did not really work. This could be an undesired consequence of online groupwork, but could also be related to the covid circumstances, or to the heavy workload at the end of the teaching term (especially when running the contest over 2.5 days instead of an intensive lab-based 2h competition).

Nonetheless, the achievements of the groups were laudable. Three of the four groups provided valid solutions to the problem. Group 4 actually found my original solution on a 4x3 platform, using a clever constructive heuristic that clustered together tasks that had high-utilisation communication flows between then, followed by some manual adjustments to tidy up the mapping. But the winner of the EMBS 2020 design contest was Group 3, who came up with a valid mapping for a 5x2 platform, therefore using fewer processors than the solution found by Group 4 (and myself). Their approach was based on the use of Genetic Algorithms for task mapping, which was covered in the new lectures and practical exercises I added to EMBS this year. Remarkable work, based on an unusual network-on-chip topology, but fulfilling completely the rubric of the design contest.

As always, we close the blog post with a picture of the winning group, Group 3. Fittingly for 2020, the picture is a snapshot of a videoconference. The group members will receive their prize (a snack giftbox each) via post this year.

 

And for finding my original solution to the challenge, I decided to award an honourable mention to Group 4 and add their photo as well.

 

Finally, links to the complete EMBS Design Contest Hall of Fame, with pictures of the top teams from 2019, 2018, 2017, 2016, 2015, 2014, 2012, 2011 and 2010 (in 2013, no group managed to finish the challenge on time).

EMBS Design Contest 2019

Every year, students in the Embedded Systems module take part in a design contest. In 2019, three teams competed in the task of setting up a multi-hop wireless network that is able to transmit information across the Computer Science building. This time, two teams managed to complete the task within the 2-hour slot allocated for the contest. The winner team, who finished only a few minutes earlier, received a box of chocolates and was granted the honour of having a picture published in this blog:

The second group to finish also received an honourable mention, and a smaller picture in the blog:

Here is the complete hall of fame, with links to the pictures of the top teams from 2018, 2017, 2016, 2015, 2014, 2012, 2011 and 2010 (in 2013, no group managed to finish the task).